// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
/*
 * Copyright (C) 2025, STMicroelectronics - All Rights Reserved
 * Author: STM32CubeMX code generation for STMicroelectronics.
 */

/dts-v1/;

#include <dt-bindings/pinctrl/stm32-pinfunc.h>
#include "stm32mp157.dtsi"
#include "stm32mp15xc.dtsi"

/ {
    model = "STMicroelectronics STM32MP157F-DK2 STM32CubeMX board - OP-TEE";
    compatible = "st,stm32mp157f-dk2-2-mx", "st,stm32mp157f-dk2", "st,stm32mp157";

    memory@c0000000 {
        device_type = "memory";
        reg = <0xc0000000 0x20000000>;
    };

    reserved-memory {
        #address-cells = <1>;
        #size-cells = <1>;
        ranges;

        /* OP-TEE reserviert Speicher */
        optee@de000000 {
            reg = <0xde000000 0x02000000>;
            no-map;
        };

        /* Shared Memory für TEE und REE */
        tee_shm: tee-shm@df000000 {
            reg = <0xdf000000 0x00400000>;
            no-map;
        };
    };

    firmware {
        optee {
            compatible = "linaro,optee-tz";
            method = "smc";
        };
    };

    soc {
        /* OP-TEE-spezifische Geräte */
    };

    aliases {
        serial0 = &usart1;
        serial1 = &usart2;
        serial2 = &usart3;
    };

    chosen {
        stdout-path = "serial1:115200n8";
    };
};

/* Sicherheitsbezogene Komponenten */

/* Secure UART für OP-TEE Debug-Output */
&usart2 {
    status = "okay";
};

/* Cryptografische Beschleuniger */
&cryp1 {
    status = "okay";
};

&hash1 {
    status = "okay";
};

/* RNG für Secure Random Generation */
&rng1 {
    status = "okay";
};

/* RTC ist sicherheitsrelevant */
&rtc {
    status = "okay";
};

/* TAMP ist für Tamper-Erkennung */
&tamp {
    status = "okay";
};

/* Power Management */
&pwr_regulators {
    status = "okay";
};

/* I2C4 für PMIC-Zugriff */
&i2c4 {
    status = "okay";

    pmic: stpmic@33 {
        compatible = "st,stpmic1";
        reg = <0x33>;
        status = "okay";

        regulators {
            compatible = "st,stpmic1-regulators";

            vddcore: buck1 {
                regulator-name = "vddcore";
                regulator-min-microvolt = <1200000>;
                regulator-max-microvolt = <1350000>;
                regulator-always-on;
                regulator-over-current-protection;
            };

            vdd_ddr: buck2 {
                regulator-name = "vdd_ddr";
                regulator-min-microvolt = <1350000>;
                regulator-max-microvolt = <1350000>;
                regulator-always-on;
                regulator-over-current-protection;
            };

            vdd: buck3 {
                regulator-name = "vdd";
                regulator-min-microvolt = <3300000>;
                regulator-max-microvolt = <3300000>;
                regulator-always-on;
                regulator-over-current-protection;
            };

            v3v3: buck4 {
                regulator-name = "v3v3";
                regulator-min-microvolt = <3300000>;
                regulator-max-microvolt = <3300000>;
                regulator-always-on;
                regulator-over-current-protection;
            };

            vdda: ldo5 {
                regulator-name = "vdda";
                regulator-min-microvolt = <2900000>;
                regulator-max-microvolt = <2900000>;
                regulator-boot-on;
            };
        };
    };
};

/* Secure Clock-Konfiguration */
&rcc {
    status = "okay";
};

/* Trusted-Execution-Environment braucht ggf. Zugriff auf BSEC-Fuses */
&bsec {
    status = "okay";
};

/* Hardware-Semaphore für Secure/Non-Secure Synchronisierung */
&hsem {
    status = "okay";
};

/* Secure NVRAM */
&sram {
    status = "okay";
};

/* Sicheres Flash für OP-TEE Code/Daten */
&qspi {
    status = "okay";
    reg = <0x58003000 0x1000>, <0x70000000 0x4000000>;
    #address-cells = <1>;
    #size-cells = <0>;
    
    flash0: w25q128@0 {
        compatible = "winbond,w25q128", "jedec,spi-nor", "spi-flash";
        reg = <0>;
        spi-rx-bus-width = <4>;
        spi-max-frequency = <50000000>;
        m25p,fast-read;
        
        partitions {
            compatible = "fixed-partitions";
            #address-cells = <1>;
            #size-cells = <1>;
            
            optee@0 {
                label = "optee";
                reg = <0x00000000 0x00100000>;  /* 1MB für OP-TEE Code */
            };
            
            secure_storage@100000 {
                label = "secure_storage";
                reg = <0x00100000 0x00100000>;  /* 1MB für Secure Storage */
            };
        };
    };
};

/* Nur minimale Pin-Controller-Einstellungen für OP-TEE */
&pinctrl {
    /* Mindestanforderungen für OP-TEE */
    usart2_pins_mx: usart2_mx-0 {
        pins1 {
            pinmux = <STM32_PINMUX('F', 5, AF7)>; /* USART2_TX */
            bias-disable;
            drive-push-pull;
            slew-rate = <0>;
        };
        pins2 {
            pinmux = <STM32_PINMUX('F', 4, AF7)>; /* USART2_RX */
            bias-disable;
        };
    };
    
    quadspi_pins_mx: quadspi_mx-0 {
        pins1 {
            pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QUADSPI_BK1_NCS */
            bias-pull-up;
            drive-push-pull;
            slew-rate = <1>;
        };
        pins2 {
            pinmux = <STM32_PINMUX('F', 10, AF9)>; /* QUADSPI_CLK */
            bias-disable;
            drive-push-pull;
            slew-rate = <3>;
        };
        pins3 {
            pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QUADSPI_BK1_IO0 */
                     <STM32_PINMUX('F', 9, AF10)>, /* QUADSPI_BK1_IO1 */
                     <STM32_PINMUX('F', 7, AF9)>,  /* QUADSPI_BK1_IO2 */
                     <STM32_PINMUX('F', 6, AF9)>;  /* QUADSPI_BK1_IO3 */
            bias-disable;
            drive-push-pull;
            slew-rate = <1>;
        };
    };
    
    i2c4_pins_z_mx: i2c4_mx-0 {
        pins {
            pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */
                     <STM32_PINMUX('Z', 5, AF6)>; /* I2C4_SDA */
            bias-disable;
            drive-open-drain;
            slew-rate = <0>;
        };
    };
};

&pinctrl_z {
    /* Nur für OP-TEE benötigte Z-Pins */
};