// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
/*
 * Copyright (C) 2025, STMicroelectronics - All Rights Reserved
 * Author: STM32CubeMX code generation for STMicroelectronics.
 */

/* For more information on Device Tree configuration, please refer to
 * https://wiki.st.com/stm32mpu/wiki/Category:Device_tree_configuration
 */

/dts-v1/;

#include <dt-bindings/pinctrl/stm32-pinfunc.h>
#include "stm32mp157.dtsi"
#include "stm32mp15xc.dtsi"
#include "stm32mp15xxac-pinctrl.dtsi"
#include "stm32mp15-m4-srm.dtsi"

/* USER CODE BEGIN includes */
#include <dt-bindings/mfd/st,stpmic1.h>
#include <dt-bindings/rtc/rtc-stm32.h>
#include <dt-bindings/net/ti-dp83867.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/leds-pca9532.h>

#include "stm32mp157c-dk2-scmi.dtsi"
#include "stm32mp15-pinctrl.dtsi"


/* USER CODE END includes */
/ {
	model = "STMicroelectronics STM32MP157F-DK2 STM32CubeMX board - openstlinux-6.6-yocto-scarthgap-mpu-v24.11.06";
	compatible = "st,stm32mp157f-dk2-2-mx", "st,stm32mp157f-dk2", "st,stm32mp157";

	memory@c0000000 {
		device_type = "memory";
		reg = <0xc0000000 0x20000000>;

		/* USER CODE BEGIN memory */
		/* USER CODE END memory */
	};

	reserved-memory {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		/* USER CODE BEGIN reserved-memory */

		mcuram2:mcuram2@10000000{
			compatible = "shared-dma-pool";
			reg = <0x10000000 0x40000>;
			no-map;
		};

		vdev0vring0:vdev0vring0@10040000{
			compatible = "shared-dma-pool";
			reg = <0x10040000 0x1000>;
			no-map;
		};

		vdev0vring1:vdev0vring1@10041000{
			compatible = "shared-dma-pool";
			reg = <0x10041000 0x1000>;
			no-map;
		};

		vdev0buffer:vdev0buffer@10042000{
			compatible = "shared-dma-pool";
			reg = <0x10042000 0x4000>;
			no-map;
		};

		mcu_rsc_table:mcu-rsc-table@10048000{
			compatible = "shared-dma-pool";
			reg = <0x10048000 0x8000>;
			no-map;
		};

		mcuram:mcuram@30000000{
			compatible = "shared-dma-pool";
			reg = <0x30000000 0x40000>;
			no-map;
		};

		retram:retram@38000000{
			compatible = "shared-dma-pool";
			reg = <0x38000000 0x10000>;
			no-map;
		};

		gpu_reserved:gpu@d4000000{
			reg = <0xd4000000 0x4000000>;
			no-map;
		};

		linux,cma{
			compatible = "shared-dma-pool";
			reusable;
			size = <0x8000000>;
			alignment = <0x2000>;
			linux,cma-default;
		};
		/* USER CODE END reserved-memory */
	};

	/* USER CODE BEGIN root */

	aliases{
		mmc0 = &sdmmc1;
		mmc1 = &sdmmc2;
		rtc0	= &i2c4_rtc;
		rtc1	= &rtc;
		ethernet0 = &ethernet0;
		serial0 = &usart1;
		serial1 = &usart2;
		serial2 = &usart3;
	};

	/* DVI Transmitter Definition */
	dvi_transmitter: tfp410 {
    		compatible = "ti,tfp410";
    		pinctrl-names = "default";
		pinctrl-0 = <&tfp410_pins>;
    		powerdown-gpios = <&gpioa 6 GPIO_ACTIVE_LOW>;
    		reset-gpios = <&gpioa 4 GPIO_ACTIVE_LOW>;  /* HDMI_NRST auf PA4 (aktiv niedrig) */
    		
    		/* Neuer Eintrag für den Interrupt-Pin PA3 */
    		interrupt-parent = <&gpioa>;
    		interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
    
    		ports {
        		#address-cells = <1>;
        		#size-cells = <0>;
        
        		port@0 {
            			reg = <0>;
            			tfp410_in: endpoint {
                			remote-endpoint = <&ltdc_out0>;
            			};
        		};
        
        		port@1 {
            			reg = <1>;
            			tfp410_out: endpoint {
                			remote-endpoint = <&dvi_connector_in>;
            			};
        		};
    		};
	};
	
    	/* DVI Connector Definition */
    	dvi: connector {
    		compatible = "dvi-connector";
    		label = "dvi";
    		ddc-i2c-bus = <&i2c2>;
    
    		port {
        		dvi_connector_in: endpoint {
            			remote-endpoint = <&tfp410_out>;
        		};
    		};
	};
	
	led{
		compatible = "gpio-leds";

		led-a{
			label = "heartbeat";
			gpios = <&gpiof 12 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "heartbeat";
			default-state = "off";
		};
	};

	sound{		
		compatible = "simple-audio-card";
        	simple-audio-card,name = "STM32MP1-DCM-Audio";
        	simple-audio-card,format = "i2s";
        	simple-audio-card,widgets =
            		"Microphone", "Mic Jack",
            		"Line", "Line In",
            		"Line", "Line Out",
            		"Headphone", "Headphone Jack";
        
        	simple-audio-card,routing =
            		"Line Out", "LOUT",
            		"Line Out", "ROUT",
            		"Headphone Jack", "LHPOUT",
            		"Headphone Jack", "RHPOUT",
            		"LLINEIN", "Line In",
            		"RLINEIN", "Line In",
            		"MICIN", "Mic Jack";
        
        	simple-audio-card,cpu {
            		sound-dai = <&sai2>; /* Anpassen an den verwendeten SAI-Port */
        	};
        
        	simple-audio-card,codec {
            		sound-dai = <&tlv320ahc>;
            		system-clock-frequency = <12288000>; /* Typischer Takt, anpassen falls nötig */
        	};
    	};

	vin:vin{
		compatible = "regulator-fixed";
		regulator-name = "vin";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-always-on;
	};

	chosen{
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;
		stdout-path = "serial1:115200n8";

		framebuffer {
			compatible = "simple-framebuffer";
			clocks = <&rcc LTDC_PX>;
			status = "disabled";
		};
	};

	wifi_pwrseq: wifi-pwrseq {
    		compatible = "mmc-pwrseq-simple";
    		/* reset-gpios = <&gpioh 4 GPIO_ACTIVE_LOW>; */
    		/* Fügen Sie hier weitere Reset- oder Power-Control-Pins hinzu, falls notwendig */
	};
	/* USER CODE END root */

	clocks{

		/* USER CODE BEGIN clocks */
		/* USER CODE END clocks */
	#ifndef CONFIG_TFABOOT
		clk_lsi: clk-lsi {
			clock-frequency = <32000>;
		};
		clk_hsi: clk-hsi {
			clock-frequency = <64000000>;
		};
		clk_csi: clk-csi {
			clock-frequency = <4000000>;
		};
		clk_lse: clk-lse {
			clock-frequency = <32768>;
			st,css;
		};
		clk_hse: clk-hse {
			clock-frequency = <24000000>;
		};
	#endif	/*CONFIG_TFABOOT*/
	};

}; /*root*/

&pinctrl {
	u-boot,dm-pre-reloc;
	
	swd_pins_mx: swd_pins_mx-0 {
        	pins {
            		pinmux = <STM32_PINMUX('A', 13, AF0)>,  /* SWDIO */
                		 <STM32_PINMUX('A', 14, AF0)>;  /* SWCLK */
            		bias-disable;
        	};
    	};

	eth1_pins_mx: eth1_mx-0 {
		pins1 {
			pinmux = <STM32_PINMUX('A',  1, AF11)>, /* ETH1_RX_CLK */
				 <STM32_PINMUX('A',  7, AF11)>, /* ETH1_RX_CTL */
				 <STM32_PINMUX('C',  4, AF11)>, /* ETH1_RXD0 */
				 <STM32_PINMUX('C',  5, AF11)>, /* ETH1_RXD1 */
				 <STM32_PINMUX('H',  6, AF11)>, /* ETH1_RXD2 */
				 <STM32_PINMUX('B',  1, AF11)>, /* ETH1_RXD3 */
				 <STM32_PINMUX('G', 12, AF11)>; /* ETH1_PHY_INTN */
			bias-disable;
		};
		pins2 {
			pinmux = <STM32_PINMUX('A',  2, AF11)>; /* ETH1_MDIO */
			bias-disable;
			drive-push-pull;
			slew-rate = <0>;
		};
		pins3 {
			pinmux = <STM32_PINMUX('B', 11, AF11)>, /* ETH1_TX_CTL */
				 <STM32_PINMUX('C',  1, AF11)>, /* ETH1_MDC */
				 <STM32_PINMUX('G',  4, AF11)>, /* ETH1_GTX_CLK */
				 <STM32_PINMUX('G',  5, AF11)>, /* ETH1_CLK125 */
				 <STM32_PINMUX('G', 13, AF11)>, /* ETH1_TXD0 */
				 <STM32_PINMUX('G', 14, AF11)>, /* ETH1_TXD1 */
				 <STM32_PINMUX('C',  2, AF11)>, /* ETH1_TXD2 */
				 <STM32_PINMUX('E',  2, AF11)>; /* ETH1_TXD3 */
			bias-disable;
			drive-push-pull;
			slew-rate = <2>;
		};
	};

	eth1_sleep_pins_mx: eth1_sleep_mx-0 {
		pins {
			pinmux = <STM32_PINMUX('A',  1, ANALOG)>, /* ETH1_RX_CLK */
				 <STM32_PINMUX('A',  7, ANALOG)>, /* ETH1_RX_CTL */
				 <STM32_PINMUX('C',  4, ANALOG)>, /* ETH1_RXD0 */
				 <STM32_PINMUX('C',  5, ANALOG)>, /* ETH1_RXD1 */
				 <STM32_PINMUX('H',  6, ANALOG)>, /* ETH1_RXD2 */
				 <STM32_PINMUX('B',  1, ANALOG)>, /* ETH1_RXD3 */
				 <STM32_PINMUX('G', 12, ANALOG)>, /* ETH1_PHY_INTN */
				 <STM32_PINMUX('A',  2, ANALOG)>, /* ETH1_MDIO */
				 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_TX_CTL */
				 <STM32_PINMUX('C',  1, ANALOG)>, /* ETH1_MDC */
				 <STM32_PINMUX('G',  4, ANALOG)>, /* ETH1_GTX_CLK */
				 <STM32_PINMUX('G',  5, ANALOG)>, /* ETH1_CLK125 */
				 <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_TXD0 */
				 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH1_TXD1 */
				 <STM32_PINMUX('C',  2, ANALOG)>, /* ETH1_TXD2 */
				 <STM32_PINMUX('E',  2, ANALOG)>; /* ETH1_TXD3 */
		};
	};

	hdmi_cec_pins_mx: hdmi_cec_mx-0 {
		pins {
			pinmux = <STM32_PINMUX('A', 15, AF4)>; /* CEC */
			bias-disable;
			drive-open-drain;
			slew-rate = <0>;
		};
	};

	hdmi_cec_sleep_pins_mx: hdmi_cec_sleep_mx-0 {
		pins {
			pinmux = <STM32_PINMUX('A', 15, ANALOG)>; /* CEC */
		};
	};

	i2c1_pins_mx: i2c1_mx-0 {
		pins {
			pinmux = <STM32_PINMUX('F', 14, AF5)>, /* I2C1_SCL */
				 <STM32_PINMUX('F', 15, AF5)>; /* I2C1_SDA */
			bias-disable;
			drive-open-drain;
			slew-rate = <0>;
		};
	};

	i2c1_sleep_pins_mx: i2c1_sleep_mx-0 {
		pins {
			pinmux = <STM32_PINMUX('F', 14, ANALOG)>, /* I2C1_SCL */
				 <STM32_PINMUX('F', 15, ANALOG)>; /* I2C1_SDA */
		};
	};

	i2c2_pins_mx: i2c2_mx-0 {
		pins {
			pinmux = <STM32_PINMUX('F',  1, AF4)>, /* I2C2_SCL */
				 <STM32_PINMUX('F',  0, AF4)>; /* I2C2_SDA */
			bias-disable;
			drive-open-drain;
			slew-rate = <0>;
		};
	};

	i2c2_sleep_pins_mx: i2c2_sleep_mx-0 {
		pins {
			pinmux = <STM32_PINMUX('F',  1, ANALOG)>, /* I2C2_SCL */
				 <STM32_PINMUX('F',  0, ANALOG)>; /* I2C2_SDA */
		};
	};

	i2c3_pins_mx: i2c3_mx-0 {
		pins {
			pinmux = <STM32_PINMUX('H',  7, AF4)>, /* I2C3_SCL */
				 <STM32_PINMUX('H',  8, AF4)>; /* I2C3_SDA */
			bias-disable;
			drive-open-drain;
			slew-rate = <0>;
		};
	};

	i2c3_sleep_pins_mx: i2c3_sleep_mx-0 {
		pins {
			pinmux = <STM32_PINMUX('H',  7, ANALOG)>, /* I2C3_SCL */
				 <STM32_PINMUX('H',  8, ANALOG)>; /* I2C3_SDA */
		};
	};

	rtc_pins_mx: rtc_mx-0 {
		pins {
			pinmux = <STM32_PINMUX('I', 8, ANALOG)>; /* RTC_LSCO */
		};
	};

	rtc_sleep_pins_mx: rtc_sleep_mx-0 {
		pins {
			pinmux = <STM32_PINMUX('I', 8, ANALOG)>; /* RTC_LSCO */
		};
	};

	ltdc_pins_mx: ltdc_mx-0 {
		pins1 {
			pinmux = <STM32_PINMUX('D',  9, AF14)>, /* LTDC_B0 */
				 <STM32_PINMUX('A', 10, AF14)>, /* LTDC_B1 */
				 <STM32_PINMUX('G', 10, AF14)>, /* LTDC_B2 */
				 <STM32_PINMUX('D', 10, AF14)>, /* LTDC_B3 */
				 <STM32_PINMUX('I',  4, AF14)>, /* LTDC_B4 */
				 <STM32_PINMUX('I',  5, AF14)>, /* LTDC_B5 */
				 <STM32_PINMUX('B',  8, AF14)>, /* LTDC_B6 */
				 <STM32_PINMUX('D',  8, AF14)>, /* LTDC_B7 */
				 <STM32_PINMUX('E',  5, AF14)>, /* LTDC_G0 */
				 <STM32_PINMUX('B',  0, AF14)>, /* LTDC_G1 */
				 <STM32_PINMUX('H', 13, AF14)>, /* LTDC_G2 */
				 <STM32_PINMUX('E', 11, AF14)>, /* LTDC_G3 */
				 <STM32_PINMUX('H', 15, AF14)>, /* LTDC_G4 */
				 <STM32_PINMUX('H',  4,  AF9)>, /* LTDC_G5 */
				 <STM32_PINMUX('I', 11, AF14)>, /* LTDC_G6 */
				 <STM32_PINMUX('I',  2, AF14)>, /* LTDC_G7 */
				 <STM32_PINMUX('H',  2, AF14)>, /* LTDC_R0 */
				 <STM32_PINMUX('D', 15, AF14)>, /* LTDC_R1 */
				 <STM32_PINMUX('C', 10, AF14)>, /* LTDC_R2 */
				 <STM32_PINMUX('H',  9, AF14)>, /* LTDC_R3 */
				 <STM32_PINMUX('H', 10, AF14)>, /* LTDC_R4 */
				 <STM32_PINMUX('H', 11, AF14)>, /* LTDC_R5 */
				 <STM32_PINMUX('H', 12, AF14)>, /* LTDC_R6 */	 
				 <STM32_PINMUX('E', 15, AF14)>, /* LTDC_R7 */	 
				 <STM32_PINMUX('E', 13, AF14)>, /* LTDC_DE */	 
				 <STM32_PINMUX('I', 10, AF14)>, /* LTDC_HSYNC */ 
				 <STM32_PINMUX('I',  9, AF14)>; /* LTDC_VSYNC */
			bias-disable;
			drive-push-pull;
			slew-rate = <0>;
		};
		pins2 {
			pinmux = <STM32_PINMUX('G',  7, AF14)>; /* LTDC_CLK */
			bias-disable;
			drive-push-pull;
			slew-rate = <1>;
		};
	};

	ltdc_sleep_pins_mx: ltdc_sleep_mx-0 {
		pins {
			pinmux = <STM32_PINMUX('D',  9, ANALOG)>, /* LTDC_B0 */
				 <STM32_PINMUX('A', 10, ANALOG)>, /* LTDC_B1 */
				 <STM32_PINMUX('G', 10, ANALOG)>, /* LTDC_B2 */
				 <STM32_PINMUX('D', 10, ANALOG)>, /* LTDC_B3 */
				 <STM32_PINMUX('I',  4, ANALOG)>, /* LTDC_B4 */
				 <STM32_PINMUX('I',  5, ANALOG)>, /* LTDC_B5 */
				 <STM32_PINMUX('B',  8, ANALOG)>, /* LTDC_B6 */
				 <STM32_PINMUX('D',  8, ANALOG)>, /* LTDC_B7 */
				 <STM32_PINMUX('E',  5, ANALOG)>, /* LTDC_G0 */
				 <STM32_PINMUX('B',  0, ANALOG)>, /* LTDC_G1 */
				 <STM32_PINMUX('H', 13, ANALOG)>, /* LTDC_G2 */
				 <STM32_PINMUX('E', 11, ANALOG)>, /* LTDC_G3 */
				 <STM32_PINMUX('H', 15, ANALOG)>, /* LTDC_G4 */
				 <STM32_PINMUX('H',  4, ANALOG)>, /* LTDC_G5 */
				 <STM32_PINMUX('I', 11, ANALOG)>, /* LTDC_G6 */
				 <STM32_PINMUX('I',  2, ANALOG)>, /* LTDC_G7 */
				 <STM32_PINMUX('H',  2, ANALOG)>, /* LTDC_R0 */
				 <STM32_PINMUX('D', 15, ANALOG)>, /* LTDC_R1 */
				 <STM32_PINMUX('C', 10, ANALOG)>, /* LTDC_R2 */
				 <STM32_PINMUX('H',  9, ANALOG)>, /* LTDC_R3 */
				 <STM32_PINMUX('H', 10, ANALOG)>, /* LTDC_R4 */
				 <STM32_PINMUX('H', 11, ANALOG)>, /* LTDC_R5 */
				 <STM32_PINMUX('H', 12, ANALOG)>, /* LTDC_R6 */	 
				 <STM32_PINMUX('E', 15, ANALOG)>, /* LTDC_R7 */	 
			/*	 <STM32_PINMUX('E', 13, ANALOG)>, */ /* LTDC_DE */	 
				 <STM32_PINMUX('I', 10, ANALOG)>, /* LTDC_HSYNC */ 
				 <STM32_PINMUX('I',  9, ANALOG)>, /* LTDC_VSYNC */
				 <STM32_PINMUX('G',  7, ANALOG)>; /* LTDC_CLK */
		};
	};
	
	quadspi_pins_mx: quadspi_mx-0 {
		u-boot,dm-pre-reloc;
		pins1 {
			u-boot,dm-pre-reloc;
			pinmux = <STM32_PINMUX('B', 6, AF10)>; /* QUADSPI_BK1_NCS */
			bias-pull-up;
			drive-push-pull;
			slew-rate = <1>;
		};
		pins2 {
			u-boot,dm-pre-reloc;
			pinmux = <STM32_PINMUX('F', 10,  AF9)>; /* QUADSPI_CLK */
			bias-disable;
			drive-push-pull;
			slew-rate = <3>;
		};
		pins3 {
			u-boot,dm-pre-reloc;
			pinmux = <STM32_PINMUX('F', 8, AF10)>, /* QUADSPI_BK1_IO0 */
				 <STM32_PINMUX('F', 9, AF10)>, /* QUADSPI_BK1_IO1 */
				 <STM32_PINMUX('F', 7,  AF9)>, /* QUADSPI_BK1_IO2 */
				 <STM32_PINMUX('F', 6,  AF9)>; /* QUADSPI_BK1_IO3 */
				 
				 
				 
			bias-disable;
			drive-push-pull;
			slew-rate = <1>;
		};
	};

	quadspi_sleep_pins_mx: quadspi_sleep_mx-0 {
		u-boot,dm-pre-reloc;
		pins {
			u-boot,dm-pre-reloc;
			pinmux = <STM32_PINMUX('B',  6, ANALOG)>, /* QUADSPI_BK1_NCS */
				 <STM32_PINMUX('F', 10, ANALOG)>, /* QUADSPI_CLK */
				 <STM32_PINMUX('F',  8, ANALOG)>, /* QUADSPI_BK1_IO0 */
				 <STM32_PINMUX('F',  9, ANALOG)>, /* QUADSPI_BK1_IO1 */
				 <STM32_PINMUX('F',  7, ANALOG)>, /* QUADSPI_BK1_IO2 */
				 <STM32_PINMUX('F',  6, ANALOG)>; /* QUADSPI_BK1_IO3 */
		};
	};
	
	sai2a_pins_mx: sai2a_mx-0 {
		pins {
			pinmux = <STM32_PINMUX('I', 6, AF10)>; /* SAI2_SD_A */
			/*	 <STM32_PINMUX('E', 0, AF10)>,*/ /* SAI2_MCLK_A */
			/*	 <STM32_PINMUX('I', 5, AF10)>,*/ /* SAI2_SCK_A */
			/*	 <STM32_PINMUX('I', 7, AF10)>;*/ /* SAI2_FS_A */
			bias-disable;
			drive-push-pull;
			slew-rate = <0>;
		};
	};

	sai2a_sleep_pins_mx: sai2a_sleep_mx-0 {
		pins {
			pinmux = <STM32_PINMUX('I', 6, ANALOG)>; /* SAI2_SD_A */
			/*	 <STM32_PINMUX('E', 0, ANALOG)>,*/ /* SAI2_MCLK_A */
			/*	 <STM32_PINMUX('I', 5, ANALOG)>,*/ /* SAI2_SCK_A */
			/*	 <STM32_PINMUX('I', 7, ANALOG)>;*/ /* SAI2_FS_A */
		};
	};

	sai2b_pins_mx: sai2b_mx-0 {
		pins {
			pinmux = <STM32_PINMUX('F', 11, AF10)>, /* SAI2_SD_B */
				 <STM32_PINMUX('H',  3, AF10)>, /* SAI2_MCLK_B */
				 <STM32_PINMUX('E', 12, AF10)>, /* SAI2_SCK_B */
				 <STM32_PINMUX('C',  0,  AF8)>; /* SAI2_FS_B */
			bias-disable;
			drive-push-pull;
			slew-rate = <0>;
		};
	};

	sai2b_sleep_pins_mx: sai2b_sleep_mx-0 {
		pins {
			pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* SAI2_SD_B */
				 <STM32_PINMUX('H',  3, ANALOG)>, /* SAI2_MCLK_B */
				 <STM32_PINMUX('E', 12, ANALOG)>, /* SAI2_SCK_B */
				 <STM32_PINMUX('C',  0, ANALOG)>; /* SAI2_FS_B */
		};
	};

	sdmmc1_pins_mx: sdmmc1_mx-0 {
		u-boot,dm-pre-reloc;
		pins1 {
			u-boot,dm-pre-reloc;
			pinmux = <STM32_PINMUX('C',  8, AF12)>, /* SDMMC1_D0 */
				 <STM32_PINMUX('C',  9, AF12)>, /* SDMMC1_D1 */
				 <STM32_PINMUX('E',  6, AF8 )>, /* SDMMC1_D2 */
				 <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
				 <STM32_PINMUX('D',  2, AF12)>; /* SDMMC1_CMD */
					 
			bias-disable;
			drive-push-pull;
			slew-rate = <1>;
		};
		pins2 {
			u-boot,dm-pre-reloc;
			pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
			bias-disable;
			drive-push-pull;
			slew-rate = <2>;
		};
	};

	sdmmc1_opendrain_pins_mx: sdmmc1_opendrain_mx-0 {
		u-boot,dm-pre-reloc;
		pins1 {
			u-boot,dm-pre-reloc;
			pinmux = <STM32_PINMUX('C',  8, AF12)>, /* SDMMC1_D0 */
				 <STM32_PINMUX('C',  9, AF12)>, /* SDMMC1_D1 */
				 <STM32_PINMUX('E',  6, AF8 )>, /* SDMMC1_D2 */	 
				 <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */
					 
			bias-disable;
			drive-push-pull;
			slew-rate = <1>;
		};
		pins2 {
			u-boot,dm-pre-reloc;
			pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
			bias-disable;
			drive-push-pull;
			slew-rate = <2>;
		};
		pins3 {
			u-boot,dm-pre-reloc;
			pinmux = <STM32_PINMUX('D',  2, AF12)>; /* SDMMC1_CMD */
			bias-disable;
			drive-open-drain;
			slew-rate = <1>;
		};
	};

	sdmmc1_sleep_pins_mx: sdmmc1_sleep_mx-0 {
		u-boot,dm-pre-reloc;
		pins {
			u-boot,dm-pre-reloc;
			pinmux = <STM32_PINMUX('C',  8, ANALOG)>, /* SDMMC1_D0 */
				 <STM32_PINMUX('C',  9, ANALOG)>, /* SDMMC1_D1 */
				 <STM32_PINMUX('E',  6, ANALOG)>, /* SDMMC1_D2 */
				 <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */
				 <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */
				 <STM32_PINMUX('D',  2, ANALOG)>; /* SDMMC1_CMD */
		};
	};

	sdmmc1_cd_pins: sdmmc1_cd_pins-0 {
		u-boot,dm-pre-reloc;
        	pins {
            		pinmux = <STM32_PINMUX('F', 2, GPIO)>;  /* SD_DETECT auf PF2 */
            		bias-pull-up;                           /* Pull-up für Card-Detect */
        	};
    	};
    	
	sdmmc2_pins_mx: sdmmc2_mx-0 {
		u-boot,dm-pre-reloc;
		pins1 {
			u-boot,dm-pre-reloc;
			pinmux = <STM32_PINMUX('B', 14, AF9 )>, /* SDMMC2_D0 */
				 <STM32_PINMUX('B', 15, AF9 )>, /* SDMMC2_D1 */
				 <STM32_PINMUX('B',  3, AF9 )>, /* SDMMC2_D2 */
				 <STM32_PINMUX('B',  4, AF9 )>, /* SDMMC2_D3 */
				 <STM32_PINMUX('A',  8, AF9 )>, /* SDMMC2_D4 */
				 <STM32_PINMUX('A',  9, AF10)>, /* SDMMC2_D5 */
				 <STM32_PINMUX('C',  6, AF10)>, /* SDMMC2_D6 */
				 <STM32_PINMUX('D',  3, AF9 )>, /* SDMMC2_D7 */
				 <STM32_PINMUX('G',  6, AF10)>; /* SDMMC2_CMD */	 
			bias-pull-up;
			drive-push-pull;
			slew-rate = <1>;
		};
		pins2 {
			u-boot,dm-pre-reloc;
			pinmux = <STM32_PINMUX('E',  3, AF9 )>; /* SDMMC2_CK */
			bias-pull-up;
			drive-push-pull;
			slew-rate = <2>;
		};
	};

	sdmmc2_opendrain_pins_mx: sdmmc2_opendrain_mx-0 {
		u-boot,dm-pre-reloc;
		pins1 {
			u-boot,dm-pre-reloc;
			pinmux = <STM32_PINMUX('B', 14, AF9 )>, /* SDMMC2_D0 */
				 <STM32_PINMUX('B', 15, AF9 )>, /* SDMMC2_D1 */
				 <STM32_PINMUX('B',  3, AF9 )>, /* SDMMC2_D2 */
				 <STM32_PINMUX('B',  4, AF9 )>, /* SDMMC2_D3 */
				 <STM32_PINMUX('A',  8, AF9 )>, /* SDMMC2_D4 */
				 <STM32_PINMUX('A',  9, AF10)>, /* SDMMC2_D5 */
				 <STM32_PINMUX('C',  6, AF10)>, /* SDMMC2_D6 */
				 <STM32_PINMUX('D',  3, AF9 )>; /* SDMMC2_D7 */
			bias-pull-up;
			drive-push-pull;
			slew-rate = <1>;
		};
		pins2 {
			u-boot,dm-pre-reloc;
			pinmux = <STM32_PINMUX('E',  3, AF9 )>; /* SDMMC2_CK */
			bias-pull-up;
			drive-push-pull;
			slew-rate = <2>;
		};
		pins3 {
			u-boot,dm-pre-reloc;
			pinmux = <STM32_PINMUX('G',  6, AF10)>; /* SDMMC2_CMD */
			bias-pull-up;
			drive-open-drain;
			slew-rate = <1>;
		};
	};

	sdmmc2_sleep_pins_mx: sdmmc2_sleep_mx-0 {
		u-boot,dm-pre-reloc;
		pins {
			u-boot,dm-pre-reloc;
			pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */
				 <STM32_PINMUX('B', 15, ANALOG)>, /* SDMMC2_D1 */
				 <STM32_PINMUX('B',  3, ANALOG)>, /* SDMMC2_D2 */
				 <STM32_PINMUX('B',  4, ANALOG)>, /* SDMMC2_D3 */
				 <STM32_PINMUX('A',  8, ANALOG)>, /* SDMMC2_D4 */
				 <STM32_PINMUX('A',  9, ANALOG)>, /* SDMMC2_D5 */
				 <STM32_PINMUX('C',  6, ANALOG)>, /* SDMMC2_D6 */
				 <STM32_PINMUX('D',  3, ANALOG)>, /* SDMMC2_D7 */
				 <STM32_PINMUX('G',  6, ANALOG)>, /* SDMMC2_CMD */
				 <STM32_PINMUX('E',  3, ANALOG)>; /* SDMMC2_CK */
		};
	};

	sdmmc3_pins_mx: sdmmc3_mx-0 {
		u-boot,dm-pre-reloc;
		pins1 {
			u-boot,dm-pre-reloc;
			pinmux = <STM32_PINMUX('D',  1, AF10)>, /* SDMMC3_D0 */
				 <STM32_PINMUX('D',  4, AF10)>, /* SDMMC3_D1 */
				 <STM32_PINMUX('D',  5, AF10)>, /* SDMMC3_D2 */
				 <STM32_PINMUX('D',  7, AF10)>, /* SDMMC3_D3 */
				 <STM32_PINMUX('D',  0, AF10)>; /* SDMMC3_CMD */
					 
			bias-disable;
			drive-push-pull;
			slew-rate = <1>;
		};
		pins2 {
			u-boot,dm-pre-reloc;
			pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
			bias-disable;
			drive-push-pull;
			slew-rate = <2>;
		};
	};

	sdmmc3_opendrain_pins_mx: sdmmc3_opendrain_mx-0 {
		u-boot,dm-pre-reloc;
		pins1 {
			u-boot,dm-pre-reloc;
			pinmux = <STM32_PINMUX('D',  1, AF10)>, /* SDMMC3_D0 */
				 <STM32_PINMUX('D',  4, AF10)>, /* SDMMC3_D1 */
				 <STM32_PINMUX('D',  5, AF10)>, /* SDMMC3_D2 */	 
				 <STM32_PINMUX('D',  7, AF10)>; /* SDMMC3_D3 */
					 
			bias-disable;
			drive-push-pull;
			slew-rate = <1>;
		};
		pins2 {
			u-boot,dm-pre-reloc;
			pinmux = <STM32_PINMUX('G', 15, AF10)>; /* SDMMC3_CK */
			bias-disable;
			drive-push-pull;
			slew-rate = <2>;
		};
		pins3 {
			u-boot,dm-pre-reloc;
			pinmux = <STM32_PINMUX('D',  0, AF10)>; /* SDMMC3_CMD */
			bias-disable;
			drive-open-drain;
			slew-rate = <1>;
		};
	};

	sdmmc3_sleep_pins_mx: sdmmc3_sleep_mx-0 {
		u-boot,dm-pre-reloc;
		pins {
			u-boot,dm-pre-reloc;
			pinmux = <STM32_PINMUX('D',  1, ANALOG)>, /* SDMMC3_D0 */
				 <STM32_PINMUX('D',  4, ANALOG)>, /* SDMMC3_D1 */
				 <STM32_PINMUX('D',  5, ANALOG)>, /* SDMMC3_D2 */
				 <STM32_PINMUX('D',  7, ANALOG)>, /* SDMMC3_D3 */
				 <STM32_PINMUX('G', 15, ANALOG)>, /* SDMMC3_CK */
				 <STM32_PINMUX('D',  0, ANALOG)>; /* SDMMC3_CMD */
		};
	};
	usart1_pins_mx: usart1_mx-0 {
    		pins1 {
        		pinmux = <STM32_PINMUX('G', 11, AF4)>; /* USART1_TX */
        		bias-disable;
        		drive-push-pull;
        		slew-rate = <0>;
    		};
    		pins2 {
        		pinmux = <STM32_PINMUX('Z', 6, AF7)>; /* USART1_RX */
        		bias-disable;
    		};
    		pins3 {
        		pinmux = <STM32_PINMUX('A', 12, AF7)>; /* USART1_RTS - für RS-485 Richtungssteuerung */
        		bias-disable;
        		drive-push-pull;
        		slew-rate = <0>;
    		};
    		/* Für 4-Draht-Modus zusätzlich CTS */
    		pins4 {
        		pinmux = <STM32_PINMUX('A', 11, AF7)>; /* USART1_CTS */
        		bias-disable;
    		};
	};

	usart1_sleep_pins_mx: usart1_sleep_mx-0 {
		pins {
			pinmux = <STM32_PINMUX('G', 11, ANALOG)>, /* USART1_TX */
				 <STM32_PINMUX('Z',  6, ANALOG)>, /* USART1_RX */
				 <STM32_PINMUX('A', 12, ANALOG)>, /* USART1_RTS */
				 <STM32_PINMUX('A', 11, ANALOG)>; /* USART1_CTS */
		};
	};

	usart2_pins_mx: usart2_mx-0 {
	u-boot,dm-pre-reloc;
		pins1 {
			u-boot,dm-pre-reloc;
			pinmux = <STM32_PINMUX('F',  5, AF7)>; /* USART2_TX */
			bias-disable;
			drive-push-pull;
			slew-rate = <0>;
		};
		pins2 {
			u-boot,dm-pre-reloc;
			pinmux = <STM32_PINMUX('F',  4, AF7)>; /* USART2_RX */
			bias-disable;
		};
	};

	usart2_sleep_pins_mx: usart2_sleep_mx-0 {
		u-boot,dm-pre-reloc;
		pins {
			u-boot,dm-pre-reloc;
			pinmux = <STM32_PINMUX('F',  5, ANALOG)>, /* USART2_TX */
				 <STM32_PINMUX('F',  4, ANALOG)>; /* USART2_RX */
		};
	};

	usart3_pins_mx: usart3_mx-0 {
		pins1 {
			pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
				 <STM32_PINMUX('D', 12, AF7)>; /* USART3_RTS */ bias-disable;
			bias-disable;
			drive-push-pull;
			slew-rate = <0>;
		};
		pins2 {
			pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
				 <STM32_PINMUX('D', 11, AF8)>; /* USART3_CTS */
			bias-disable;
		};
	};

	usart3_sleep_pins_mx: usart3_sleep_mx-0 {
		pins {
			pinmux = <STM32_PINMUX('B', 10, ANALOG)>, /* USART3_TX */
				 <STM32_PINMUX('B', 12, ANALOG)>, /* USART3_RX */
				 <STM32_PINMUX('D', 12, ANALOG)>, /* USART3_RTS */
				 <STM32_PINMUX('D', 11, ANALOG)>; /* USART3_CTS */
		};
	};
	
	tfp410_pins: tfp410_pins-0 {
        	pins {
        		pinmux = <STM32_PINMUX('A', 6, GPIO)>,   /* TFP410 Powerdown-Pin */
                        	 <STM32_PINMUX('A', 4, GPIO)>;   /* TFP410 Reset-Pin (HDMI_NRST) */
        		bias-disable;                    	 /* Für Powerdown und Reset */
    		};
    		pins2 {
        		pinmux = <STM32_PINMUX('A', 3, GPIO)>;   /* TFP410 Interrupt-Pin separater Eintrag */
        		bias-pull-up;                            /* Pull-up für Interrupt-Pin */
    		};
    	};

	m4_spi1_pins_mx: m4_spi1_mx-0 {
    		pins {
        		pinmux = <STM32_PINMUX('B',  5, AF5)>,   /* SPI1_MOSI */
            			 <STM32_PINMUX('A',  5, AF5)>;   /* SPI1_MISO */
        		bias-disable;
        		drive-push-pull;
        		slew-rate = <1>;  /* High speed für SPI-Kommunikation */
    		};
	};

	m4_spi1_sleep_pins_mx: m4_spi1_sleep_mx-0 {
    		pins {
        		pinmux = <STM32_PINMUX('B', 5, ANALOG)>,   /* SPI1_MOSI */
        			 <STM32_PINMUX('A', 5, ANALOG)>;   /* SPI1_MISO */
       			bias-disable;
   		 };
	};
	
	m4_spi2_pins_mx: m4_spi2_mx-0 {
    		pins {
        		pinmux = <STM32_PINMUX('C',  3, AF5)>,   /* SPI2_MOSI */
            			 <STM32_PINMUX('B', 13, AF5)>;   /* SPI2_MISO */
        		bias-disable;
        		drive-push-pull;
        		slew-rate = <1>;  /* High speed für SPI-Kommunikation */
    		};
	};

	m4_spi2_sleep_pins_mx: m4_spi2_sleep_mx-0 {
    		pins {
        		pinmux = <STM32_PINMUX('C',  3, ANALOG)>,   /* SPI2_MOSI */
        			 <STM32_PINMUX('B', 13, ANALOG)>;   /* SPI2_MISO */
       			bias-disable;
   		 };
	};
	
	/* USER CODE BEGIN pinctrl */
	/* USER CODE END pinctrl */
};

&pinctrl_z {
	u-boot,dm-pre-reloc;
	i2c4_pins_z_mx: i2c4_mx-0 {
		u-boot,dm-pre-reloc;
		pins {
			u-boot,dm-pre-reloc;
			pinmux = <STM32_PINMUX('Z', 4, AF6)>, /* I2C4_SCL */
				 <STM32_PINMUX('Z', 5, AF6)>; /* I2C4_SDA */
			bias-disable;
			drive-open-drain;
			slew-rate = <0>;
		};
	};

	i2c4_sleep_pins_z_mx: i2c4_sleep_mx-0 {
		u-boot,dm-pre-reloc;
		pins {
			u-boot,dm-pre-reloc;
			pinmux = <STM32_PINMUX('Z', 4, ANALOG)>, /* I2C4_SCL */
				 <STM32_PINMUX('Z', 5, ANALOG)>; /* I2C4_SDA */
		};
	};

	/* USER CODE BEGIN pinctrl_z */
	/* USER CODE END pinctrl_z */
};

&m4_rproc{
	/*Restriction: "memory-region" property is not managed - please to use User-Section if needed*/
	mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
	mbox-names = "vq0", "vq1", "shutdown";
	status = "okay";

	/* USER CODE BEGIN m4_rproc */
	memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
			<&vdev0vring1>, <&vdev0buffer>, <&mcu_rsc_table>;
	interrupt-parent = <&exti>;
	interrupts = <68 1>;
	wakeup-source;
	/* USER CODE END m4_rproc */

	m4_system_resources{
		status = "okay";

		/* USER CODE BEGIN m4_system_resources */
		/* USER CODE END m4_system_resources */
	};
};

&adc {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&adc_pins_mx>;
	pinctrl-1 = <&adc_sleep_pins_mx>;
	status = "okay";

	/* USER CODE BEGIN adc */
	vdd-supply = <&vdd>;
	vdda-supply = <&vdd>;
	vref-supply = <&vrefbuf>;

	adc1:adc@0{
		status = "okay";

		channel@18{
			reg = <18>;
			st,min-sample-time-ns = <5000>;
		};

		channel@19{
			reg = <19>;
			st,min-sample-time-ns = <5000>;
		};
	};

	adc2:adc@100{
		status = "okay";

		channel@18{
			reg = <18>;
			st,min-sample-time-ns = <5000>;
		};

		channel@19{
			reg = <19>;
			st,min-sample-time-ns = <5000>;
		};
	};
	/* USER CODE END adc */
};

&bsec {
	status = "okay";

	/* USER CODE BEGIN bsec */
	/* USER CODE END bsec */
};

&cec {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&hdmi_cec_pins_mx>;
	pinctrl-1 = <&hdmi_cec_sleep_pins_mx>;
	status = "okay";

	/* USER CODE BEGIN cec */
	/* USER CODE END cec */
};

&crc1 {
	status = "okay";

	/* USER CODE BEGIN crc1 */
	/* USER CODE END crc1 */
};

&cryp1 {
	status = "okay";

	/* USER CODE BEGIN cryp1 */
	/* USER CODE END cryp1 */
};

&dma1 {
	status = "okay";

	/* USER CODE BEGIN dma1 */
	sram = <&dma_pool>;
	/* USER CODE END dma1 */
};

&dma2 {
	status = "disabled";  /* Für Linux deaktivieren */

	/* USER CODE BEGIN dma2 */
	/* sram = <&dma_pool>; */
	/* USER CODE END dma2 */
};

&dmamux1 {
	status = "okay";

	dma-masters = <&dma1>;
	dma-channels = <8>;

	/* USER CODE BEGIN dmamux1 */
	/* USER CODE END dmamux1 */
};

&dts {	/* Temperatursensor */
	status = "okay";

	/* USER CODE BEGIN dts */
	/* USER CODE END dts */
};

&ethernet0{
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&eth1_pins_mx>;
	pinctrl-1 = <&eth1_sleep_pins_mx>;
	status = "okay";

	/* USER CODE BEGIN ethernet0 */
        phy-mode = "rgmii-id";
        max-speed = <1000>;
        phy-handle = <&phy0>;
        nvmem-cells = <&ethernet_mac_address>;
        nvmem-cell-names = "mac-address";
        st,eth-clk-sel = "true";
	clock-names = "stmmaceth",
		      "mac-clk-tx",
		      "mac-clk-rx",
        	      "eth-ck",
        	      "syscfg-clk",
		      "ethstp";
	clocks = <&rcc ETHMAC>,
		 <&rcc ETHTX>,
		 <&rcc ETHRX>,
        	 <&rcc ETHCK_K>,
        	 <&rcc SYSCFG>,
		 <&rcc ETHSTP>;

        mdio0 {
                #address-cells = <1>;
                #size-cells = <0>;
                compatible = "snps,dwmac-mdio";

                phy0: ethernet-phy@1 {
                        compatible = "ethernet-phy-ieee802.3-c22";
                        reg = <1>;
                        interrupt-parent = <&gpiog>;
                        interrupts = <12 IRQ_TYPE_EDGE_FALLING>;
                        ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
                        ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
                        ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
                        ti,min-output-impedance;
                        enet-phy-lane-no-swap;
			ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
                };
        };
	/* USER CODE END ethernet0 */
};

&fmc{	/* NAND */
	u-boot,dm-pre-reloc;
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&fmc_pins_mx>;
	pinctrl-1 = <&fmc_sleep_pins_mx>;
	status = "okay";

	/* USER CODE BEGIN fmc */
	nand-controller@4,0 {
		status = "okay";

		nand: nand@0 {
			reg = <0>;
			nand-on-flash-bbt;
			nand-ecc-strength = <4>;
			nand-ecc-step-size = <512>;
			#address-cells = <1>;
			#size-cells = <1>;
		};
	};
	/* USER CODE END fmc */
};

&gpu {
	status = "okay";

	/* USER CODE BEGIN gpu */
	contiguous-area = <&gpu_reserved>;
	/* USER CODE END gpu */
};

&hash1 {
	u-boot,dm-pre-reloc;
	status = "okay";

	/* USER CODE BEGIN hash1 */
	/* USER CODE END hash1 */
};

&hsem {
	status = "okay";

	/* USER CODE BEGIN hsem */
	/* USER CODE END hsem */
};

&i2c1 {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&i2c1_pins_mx>;
	pinctrl-1 = <&i2c1_sleep_pins_mx>;
	status = "okay";

	/* USER CODE BEGIN i2c1 */
	i2c-scl-rising-time-ns = <100>;
	i2c-scl-falling-time-ns = <7>;
	/delete-property/ dmas;
	/delete-property/ dma-names;

    	/* TLV320AHC Audio Codec */
    	tlv320ahc: tlv320ahc@18 {
        	compatible = "ti,tlv320aic23";
        	reg = <0x18>;
        	#sound-dai-cells = <0>;
        	status = "okay";
        
        	ports {
            		#address-cells = <1>;
            		#size-cells = <0>;
            
            		port@0 {
                		reg = <0>;
                		tlv320ahc_tx_endpoint: endpoint {
                    			remote-endpoint = <&sai2a_endpoint>;
                		};
            		};
            
            		port@1 {
                		reg = <1>;
                		tlv320ahc_rx_endpoint: endpoint {
                    			remote-endpoint = <&sai2b_endpoint>;
                		};
            		};
        	};
    	};

	/* USER CODE END i2c1 */
};

&i2c2 {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&i2c2_pins_mx>;
	pinctrl-1 = <&i2c2_sleep_pins_mx>;
	status = "okay";

	/* USER CODE BEGIN i2c2 */
	i2c-scl-rising-time-ns = <100>;  /* Typischer Wert für Standard-I2C-Leitungen */
	i2c-scl-falling-time-ns = <100>; /* Typischer Wert für Standard-I2C-Leitungen */
	clock-frequency = <100000>;      /* 100 kHz ist eine sichere Standard-Frequenz */
	/delete-property/ dmas;
	/delete-property/ dma-names;

	/* EDID-Kommunikation mit dem angeschlossenen Display */
    	dvi-connector@50 {
        	compatible = "dvi-connector";
        	reg = <0x50>;
        	/* Das ist die Standard-I2C-Adresse für EDID */
    	};
    	
    	/* USER CODE END i2c2 */
};

&i2c3 {
   	/* Grundlegende I2C3-Konfiguration */
    	pinctrl-names = "default", "sleep";
    	pinctrl-0 = <&i2c3_pins_mx>;
    	pinctrl-1 = <&i2c3_sleep_pins_mx>;
    	i2c-scl-rising-time-ns = <100>;
    	i2c-scl-falling-time-ns = <100>;
    	clock-frequency = <100000>; /* 100 kHz ist sicher für MAX9744 */
    	status = "okay";

    	/* MAX9744ETH+ Class-D Amplifier */
    	max9744: max9744@4b {
        	compatible = "maxim,max9744";
        	reg = <0x4B>;  /* Typische I2C-Adresse für MAX9744 */
        	status = "okay";
        
        	/* Wenn Sie spezifische GPIO-Pins für Steuerung haben */
        	/* shutdown-gpios = <&gpiox XX GPIO_ACTIVE_HIGH>; */ /* Ersetzen Sie mit tatsächlichem GPIO-Pin falls vorhanden */
    	};
};

&i2c4 {
	u-boot,dm-pre-reloc;
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&i2c4_pins_z_mx>;
	pinctrl-1 = <&i2c4_sleep_pins_z_mx>;
	status = "okay";

	/* USER CODE BEGIN i2c4 */
	i2c-scl-rising-time-ns = <185>;
	i2c-scl-falling-time-ns = <20>;
	clock-frequency = <400000>;
	/delete-property/ dmas;
	/delete-property/ dma-names;

	pmic:stpmic@33{
		compatible = "st,stpmic1";
		reg = <0x33>;
		interrupts-extended = <&exti 55 IRQ_TYPE_EDGE_FALLING>;
		interrupt-controller;
		#interrupt-cells = <2>;
		status = "okay";
		wakeup-source;
		
                regulators {
                        compatible = "st,stpmic1-regulators";
			buck1-supply = <&vin>;
			buck2-supply = <&vin>;
			buck3-supply = <&vin>;
			buck4-supply = <&vin>;
                        ldo1-supply = <&v3v3>;
                        ldo2-supply = <&v3v3>;
                        ldo3-supply = <&vdd_ddr>;
			ldo4-supply = <&vin>;
                        ldo5-supply = <&v3v3>;
                        ldo6-supply = <&v3v3>;
			vref_ddr-supply = <&vin>;
			boost-supply = <&vin>;
                        pwr_sw1-supply = <&bst_out>;
                        pwr_sw2-supply = <&bst_out>;

                        vddcore: buck1 {
                                regulator-name = "vddcore";
                                regulator-min-microvolt = <1200000>;
                                regulator-max-microvolt = <1350000>;
                                regulator-always-on;
                                regulator-initial-mode = <0>;
                                regulator-over-current-protection;
                        };

                        vdd_ddr: buck2 {
                                regulator-name = "vdd_ddr";
                                regulator-min-microvolt = <1350000>;
                                regulator-max-microvolt = <1350000>;
                                regulator-always-on;
                                regulator-initial-mode = <0>;
                                regulator-over-current-protection;
                        };

                        vdd: buck3 {
                                regulator-name = "vdd";
                                regulator-min-microvolt = <3300000>;
                                regulator-max-microvolt = <3300000>;
                                regulator-always-on;
                                st,mask-reset;
                                regulator-initial-mode = <0>;
                                regulator-over-current-protection;
                        };

                        v3v3: buck4 {
                                regulator-name = "v3v3";
                                regulator-min-microvolt = <3300000>;
                                regulator-max-microvolt = <3300000>;
                                regulator-always-on;
                                regulator-over-current-protection;
                                regulator-initial-mode = <0>;
                        };

                        v1v8_audio: ldo1 {
                                regulator-name = "v1v8_audio";
                                regulator-min-microvolt = <1800000>;
                                regulator-max-microvolt = <1800000>;
                                regulator-always-on;
                                interrupts = <IT_CURLIM_LDO1 0>;

                        };

                        vdd_eth_2v5: ldo2 {
                                regulator-name = "dd_eth_2v5";
                                regulator-min-microvolt = <2500000>;
                                regulator-max-microvolt = <2500000>;
                                regulator-always-on;
                                interrupts = <IT_CURLIM_LDO2 0>;

                        };

                        vtt_ddr: ldo3 {
                                regulator-name = "vtt_ddr";
                                regulator-min-microvolt = <500000>;
                                regulator-max-microvolt = <750000>;
                                regulator-always-on;
                                regulator-over-current-protection;
                        };

                        vdd_usb: ldo4 {
                                regulator-name = "vdd_usb";
                                regulator-min-microvolt = <3300000>;
                                regulator-max-microvolt = <3300000>;
                                interrupts = <IT_CURLIM_LDO4 0>;
                        };

                        vdda: ldo5 {
                                regulator-name = "vdda";
                                regulator-min-microvolt = <2900000>;
                                regulator-max-microvolt = <2900000>;
                                interrupts = <IT_CURLIM_LDO5 0>;
                                regulator-boot-on;
                        };

                        vdd_eth_1v0: ldo6 {
                                regulator-name = "vdd_eth_1v0";
                                regulator-min-microvolt = <1000000>;
                                regulator-max-microvolt = <1000000>;
                                regulator-always-on;
                                interrupts = <IT_CURLIM_LDO6 0>;

                        };

                        vref_ddr: vref_ddr {
                                regulator-name = "vref_ddr";
                                regulator-always-on;
                                regulator-over-current-protection;
                        };

                        bst_out: boost {
                                regulator-name = "bst_out";
                                interrupts = <IT_OCP_BOOST 0>;
                        };

                        vbus_otg: pwr_sw1 {
                                regulator-name = "vbus_otg";
                                interrupts = <IT_OCP_OTG 0>;
                                regulator-active-discharge;
                        };

                        vbus_sw: pwr_sw2 {
                                regulator-name = "vbus_sw";
                                interrupts = <IT_OCP_SWOUT 0>;
                                regulator-active-discharge;
                        };
                };


		onkey{
			compatible = "st,stpmic1-onkey";
			interrupts = <IT_PONKEY_F 0>, <IT_PONKEY_R 0>;
			interrupt-names = "onkey-falling", "onkey-rising";
			power-off-time-sec = <10>;
			status = "okay";
		};
		
		watchdog {
                        compatible = "st,stpmic1-wdt";
                        status = "disabled";
                };
	};
	
        i2c4_eeprom: eeprom@50 {
                compatible = "microchip,24c32", "atmel,24c32";
                reg = <0x50>;
		status = "okay";
        };

        i2c4_rtc: rtc@52 {
                compatible = "microcrystal,rv3028";
                reg = <0x52>;
                enable-level-switching-mode;
                status = "okay";
        };
	
	/* USER CODE END i2c4 */
};

&ipcc {
	status = "okay";

	/* USER CODE BEGIN ipcc */
	/* USER CODE END ipcc */
};

&iwdg2{	/* Watchdog für Cortex-A7 Core (Linux) */
	status = "okay";
	/* timeout-sec = <32>;*/ /* Timeout in Sekunden */

	/* USER CODE BEGIN iwdg2 */
        timeout-sec = <32>;
	/* USER CODE END iwdg2 */
};

&ltdc {
	status = "okay";

	/* USER CODE BEGIN ltdc */
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&ltdc_pins_mx>;
	pinctrl-1 = <&ltdc_sleep_pins_mx>;
	default-on;

	port{
		#address-cells = <1>;
		#size-cells = <0>;

		ltdc_ep0_out:endpoint{
			remote-endpoint = <&tfp410_in>;
		};
	};
	/* USER CODE END ltdc */
};

&m4_spi1 {
	pinctrl-names = "default";
	pinctrl-0 = <&m4_spi1_pins_mx>;
	status = "okay";

	/* USER CODE BEGIN m4_spi1 */
	/* USER CODE END m4_spi1 */
};

&m4_spi2 {
	pinctrl-names = "default";
	pinctrl-0 = <&m4_spi2_pins_mx>;
	status = "okay";

	/* USER CODE BEGIN m4_spi2 */
	/* USER CODE END m4_spi2 */
};

&m4_timers2 {
	status = "okay";

	/* USER CODE BEGIN m4_timers2 */
	/* USER CODE END m4_timers2 */
};

&mdma1 {
	status = "okay";

	/* USER CODE BEGIN mdma1 */
	/* USER CODE END mdma1 */
};


&pwr_regulators {
	status = "okay";

	/* USER CODE BEGIN pwr_regulators */
	vdd-supply = <&vdd>;
	vdd_3v3_usbfs-supply = <&vdd_usb>;
	/* USER CODE END pwr_regulators */
};

&qspi{
	u-boot,dm-pre-reloc;
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&quadspi_pins_mx>;
	pinctrl-1 = <&quadspi_sleep_pins_mx>;
	status = "okay";

	/* USER CODE BEGIN qspi */
        reg = <0x58003000 0x1000>, <0x70000000 0x4000000>;
        #address-cells = <1>;
        #size-cells = <0>;

        flash0: w25q128@0 {
                compatible = "winbond,w25q128", "jedec,spi-nor", "spi-flash";
                reg = <0>;
                spi-rx-bus-width = <4>;
                spi-max-frequency = <50000000>;
                m25p,fast-read;
                #address-cells = <1>;
                #size-cells = <1>;
        };
	/* USER CODE END qspi */
};

&rcc {
	u-boot,dm-pre-reloc;
	status = "okay";

	/* USER CODE BEGIN rcc */
	/* USER CODE END rcc */
};

&rtc {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&rtc_pins_mx>;
	pinctrl-1 = <&rtc_sleep_pins_mx>;
	status = "okay";

	/* USER CODE BEGIN rtc */
	st,lsco = <RTC_OUT2_RMP>;
	/* USER CODE END rtc */
};

&sai2 {
    	/* Für I2S-Modus konfigurieren */
    	st,iec60958;
    	clocks = <&rcc SAI2>, <&rcc PLL3_Q>, <&rcc PLL3_R>;
    	clock-names = "pclk", "x8k", "x11k";
    	status = "okay";
    
    	sai2a: audio-controller@4400b004 {
        	#sound-dai-cells = <0>;
        	#clock-cells = <0>;
		dma-names = "tx";
        	pinctrl-names = "default", "sleep";
        	pinctrl-0 = <&sai2a_pins_mx>;
        	pinctrl-1 = <&sai2a_sleep_pins_mx>;
        	status = "okay";
        	sai2a_port: port {
    			sai2a_endpoint: endpoint {
        			remote-endpoint = <&tlv320ahc_tx_endpoint>;
        			dai-format = "i2s";
        			mclk-fs = <256>;
        			dai-tdm-slot-num = <2>;
        			dai-tdm-slot-width = <32>;
    			};
		};
    	};
    
    	sai2b: audio-controller@4400b024 {
        	#sound-dai-cells = <0>;
        	dma-names = "rx";
        	pinctrl-names = "default", "sleep";
        	pinctrl-0 = <&sai2b_pins_mx>;
        	pinctrl-1 = <&sai2b_sleep_pins_mx>;
        	status = "okay";
        	sai2b_port: port {
    			sai2b_endpoint: endpoint {
        			remote-endpoint = <&tlv320ahc_rx_endpoint>;
        			dai-format = "i2s";
        			mclk-fs = <256>;
        			dai-tdm-slot-num = <2>;
        			dai-tdm-slot-width = <32>;
    			};
		};
    	};
};

&sdmmc1 {
	u-boot,dm-pre-reloc;
	pinctrl-names = "default", "opendrain", "sleep";
	pinctrl-0 = <&sdmmc1_pins_mx &sdmmc1_cd_pins>;
	pinctrl-1 = <&sdmmc1_opendrain_pins_mx>;
	pinctrl-2 = <&sdmmc1_sleep_pins_mx>;
	status = "okay";

	/* USER CODE BEGIN sdmmc1 */
	cd-gpios = <&gpiof 2 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
	disable-wp;
	st,neg-edge;
	bus-width = <4>;
	vmmc-supply = <&v3v3>;
	/* USER CODE END sdmmc1 */
};

&sdmmc2{
	u-boot,dm-pre-reloc;
	pinctrl-names = "default", "opendrain", "sleep";
	pinctrl-0 = <&sdmmc2_pins_mx>;
	pinctrl-1 = <&sdmmc2_opendrain_pins_mx>;
	pinctrl-2 = <&sdmmc2_sleep_pins_mx>;
	status = "okay";

	/* USER CODE BEGIN sdmmc2 */
        non-removable;
        no-sd;
        no-sdio;
        st,neg-edge;
        bus-width = <8>;
        vmmc-supply = <&v3v3>;
        vqmmc-supply = <&v3v3>;
        mmc-ddr-3_3v;
	/* USER CODE END sdmmc2 */
};

&sdmmc3 {
    pinctrl-names = "default", "opendrain", "sleep";
    pinctrl-0 = <&sdmmc3_pins_mx>;
    pinctrl-1 = <&sdmmc3_opendrain_pins_mx>;
    pinctrl-2 = <&sdmmc3_sleep_pins_mx>;
    status = "okay";
    
    non-removable;
    cap-sdio-irq;
    st,neg-edge;
    bus-width = <4>;
    vmmc-supply = <&v3v3>;
    mmc-pwrseq = <&wifi_pwrseq>;
    
    #address-cells = <1>;
    #size-cells = <0>;
    
    maya_w2: wifi@1 {
        reg = <1>;
        compatible = "u-blox,maya-w2";
    };
};

&tamp { /* Tamper-Controller des STM32MP157. Dieser Controller dient der Erkennung von Manipulationsversuchen */
	status = "okay";

	/* USER CODE BEGIN tamp */
	/* USER CODE END tamp */
};

&usart1 { /* RS-485 */
    pinctrl-names = "default", "sleep";
    pinctrl-0 = <&usart1_pins_mx>;
    pinctrl-1 = <&usart1_sleep_pins_mx>;
    status = "okay";
    
    /* RS-485 Konfiguration */
    rs485-rts-delay = <0 0>; /* Keine Verzögerung für RTS Umschaltung */
    linux,rs485-enabled-at-boot-time;  /* RS-485 bei Boot aktivieren */
    rs485-rts-active-high;  /* RTS auf High setzen zum Senden (typisch für RS-485) */
    uart-has-rtscts;  /* Aktiviert Hardware-Flow-Control-Pins */
    
    /* DMA deaktivieren, falls nicht benötigt */
    /delete-property/ dmas;
    /delete-property/ dma-names;
};

&usart2 {
    u-boot,dm-pre-reloc;
    pinctrl-names = "default", "sleep";
    pinctrl-0 = <&usart2_pins_mx>;
    pinctrl-1 = <&usart2_sleep_pins_mx>;
    status = "okay";
    
    /* Konsole/Debug-Einstellungen */
    console-port;           /* Markiert diesen Port als Konsole */
    /delete-property/ dmas; /* DMA deaktivieren für Konsole */
    /delete-property/ dma-names;
};

&usart3 {
    pinctrl-names = "default", "sleep";
    pinctrl-0 = <&usart3_pins_mx>;
    pinctrl-1 = <&usart3_sleep_pins_mx>;
    status = "okay";
    
    uart-has-rtscts;
    
    maya_w2_bt: bluetooth {
        compatible = "u-blox,maya-w2-bt";
        max-speed = <3000000>;
        vbat-supply = <&v3v3>;
        vddio-supply = <&v3v3>;
        /* shutdown-gpios = <&gpioz 6 GPIO_ACTIVE_HIGH>; */ /* Anpassen nach Ihrem Pin-Setup */
    };
};


&usbh_ehci {
	status = "okay";

	/* USER CODE BEGIN usbh_ehci */
	phys = <&usbphyc_port0>;
	#address-cells = <1>;
	#size-cells = <0>;

	hub@1{
		compatible = "usb424,2514";
		reg = <1>;
		vdd-supply = <&v3v3>;
	};
	/* USER CODE END usbh_ehci */
};

&usbh_ohci {
	status = "okay";

	/* USER CODE BEGIN usbh_ohci */
	/* USER CODE END usbh_ohci */
};

&usbotg_hs {
	u-boot,dm-pre-reloc;
	status = "okay";

	/* USER CODE BEGIN usbotg_hs */
	phys = <&usbphyc_port1 0>;
	phy-names = "usb2-phy";
	/* usb-role-switch; *
	dr_mode = "host";  /* Alternativen: "peripheral" oder "otg" */
/*
	port{

		usbotg_hs_ep:endpoint{
			remote-endpoint = <&con_usbotg_hs_ep>;
		};
	};
*/
	/* USER CODE END usbotg_hs */
};

&usbphyc {
	u-boot,dm-pre-reloc;
	status = "okay";

	/* USER CODE BEGIN usbphyc */
	/* USER CODE END usbphyc */
};

&usbphyc_port0 {
	u-boot,dm-pre-reloc;
	status = "okay";

	/* USER CODE BEGIN usbphyc_port0 */
	phy-supply = <&vdd_usb>;
	st,tune-hs-dc-level = <2>;
	st,enable-fs-rftime-tuning;
	st,enable-hs-rftime-reduction;
	st,trim-hs-current = <15>;
	st,trim-hs-impedance = <1>;
	st,tune-squelch-level = <3>;
	st,tune-hs-rx-offset = <2>;
	st,no-lsfs-sc;
	/* USER CODE END usbphyc_port0 */
};

&usbphyc_port1 {
	u-boot,dm-pre-reloc;
	status = "okay";

	/* USER CODE BEGIN usbphyc_port1 */
	phy-supply = <&vdd_usb>;
	st,tune-hs-dc-level = <2>;
	st,enable-fs-rftime-tuning;
	st,enable-hs-rftime-reduction;
	st,trim-hs-current = <15>;
	st,trim-hs-impedance = <1>;
	st,tune-squelch-level = <3>;
	st,tune-hs-rx-offset = <2>;
	st,no-lsfs-sc;
	/* USER CODE END usbphyc_port1 */
};

&vrefbuf {
	status = "okay";

	/* USER CODE BEGIN vrefbuf */
	regulator-min-microvolt = <2500000>;
	regulator-max-microvolt = <2500000>;
	vdda-supply = <&vdd>;
	/* USER CODE END vrefbuf */
};

/* USER CODE BEGIN addons */

&arm_wdt {
	timeout-sec = <32>;
	status = "okay";
};

&cpu0 {
	cpu-supply = <&vddcore>;
};

&cpu1 {
	cpu-supply = <&vddcore>;
};

&ddrperfm {
	status = "okay";
};

&usbh_ohci{
	phys = <&usbphyc_port0>;
};

&sram{

	dma_pool:dma_pool@0{
		reg = <0x50000 0x10000>;
		pool;
	};
};

&maya_w2_bt {
    clocks = <&rcc USART3>;
    clock-names = "extclk";
};

&m4_rproc{
	/*Restriction: "memory-region" property is not managed - please to use User-Section if needed*/
	mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
	mbox-names = "vq0", "vq1", "shutdown";
	status = "okay";

	/* USER CODE BEGIN m4_rproc */
	memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
	                <&vdev0vring1>, <&vdev0buffer>;
        interrupt-parent = <&exti>;
        interrupts = <68 1>;
        wakeup-source;
	/* USER CODE END m4_rproc */

	m4_system_resources{
		status = "okay";

		m4_dma2: m4_dma2 {
            		compatible = "st,stm32-dma";
            		status = "okay";
            		exclusive-use;  /* Markiert für exklusiven M4-Zugriff */
        	};
        	
        	m4_dmamux1: m4_dmamux1 {
            		compatible = "st,stm32-dmamux";
            		dma-masters = <&m4_dma2>;
            		dma-channels = <8>;  /* Anzahl der DMA2-Kanäle */
            		status = "okay";
            		exclusive-use;
        	};
        	/* USER CODE BEGIN m4_system_resources */
		/* USER CODE END m4_system_resources */
	};
};

/* USER CODE END addons */